?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b fsye33a0d, fsye33a0r radiation hardened, segr resistant n-channel power mosfets the discrete products operation of fairchild has developed a series of radiation hardened mosfets speci?ally designed for commercial and military space applications. enhanced power mosfet immunity to single event effects (see), single event gate rupture (segr) in particular, is combined with 100 krads of total dose hardness to provide devices which are ideally suited to harsh space environments. the dose rate and neutron tolerance necessary for military applications have not been sacri?ed. the fairchild portfolio of segr resistant radiation hardened mosfets includes n-channel and p-channel devices in a variety of voltage, current and on-resistance ratings. numerous packaging options are also available. this mosfet is an enhancement-mode silicon-gate power ?ld-effect transistor of the vertical dmos (vdmos) structure. it is specially designed and processed to be radiation tolerant. the mosfet is well suited for applications exposed to radiation environments such as switching regulation, switching converters, motor drives, relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate drive power. this type can be operated directly from integrated circuits. reliability screening is available as either commercial, txv equivalent of mil-prf-19500, or space equivalent of mil-prf-19500. contact fairchild for any desired deviations from the data sheet. formerly available as type ta17699w. features 5a, 400v, r ds(on) = 1.2 ? total dose - meets pre-rad speci?ations to 100 krad(si) single event - safe operating area curve for single event effects - see immunity for let of 36mev/mg/cm 2 with v ds up to 80% of rated breakdown and v gs of 10v off-bias dose rate - typically survives 3e9 rad (si)/s at 80% bv dss - typically survives 2e12 if current limited to i dm photo current - 6na per-rad(si)/s typically neutron - maintain pre-rad speci?ations for 3e12 neutrons/cm 2 - usable to 3e13 neutrons/cm 2 symbol packaging smd.5 ordering information rad level screening level part number/brand 10k commercial fsye33a0d1 100k txv FSYE33A0R3 100k space fsye33a0r4 d g s data sheet december 2001
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d fsye33a0d, fsye33a0r units drain to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v ds 400 v drain to gate voltage (r gs = 20k ? ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr 400 v continuous drain current t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 5a t c = 100 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 3a pulsed drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 15 a gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gs 20 v maximum power dissipation t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p t 75 w t c = 100 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .p t 30 w linear derating factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.60 w/ o c single pulsed avalanche current, l = 100 h (see test figure) . . . . . . . . . . . . . . . . . . . . . . . . . i as 15 a continuous source current (body diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i s 5a pulsed source current (body diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i sm 15 a operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c lead temperature (during soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l (distance >0.063in (1.6mm) from case, 10s max) 300 o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 1ma, v gs = 0v 400 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 1ma t c = -55 o c - - 5.0 v t c = 25 o c 1.5 - 4.0 v t c = 125 o c 0.5 - - v zero gate voltage drain current i dss v ds = 320v, v gs = 0v t c = 25 o c--25 a t c = 125 o c - - 250 a gate to source leakage current i gss v gs = 20v t c = 25 o c - - 100 na t c = 125 o c - - 200 na drain to source on-state voltage v ds(on) v gs = 12v, i d = 5a - - 6.6 v drain to source on resistance r ds(on)12 i d = 3a, v gs = 12v t c = 25 o c - 1.0 1.2 ? t c = 125 o c - - 2.4 ? turn-on delay time t d(on) v dd = 200v, i d = 5a, r l = 40 ? , v gs = 12v, r gs = 7.5 ? - - 20 ns rise time t r - - 25 ns turn-off delay time t d(off) - - 55 ns fall time t f - - 25 ns total gate charge q g(tot) v gs = 0v to 20v v dd = 200v, i d = 5a -55-nc gate charge at 12v q g(12) v gs = 0v to 12v - 33 36 nc threshold gate charge q g(th) v gs = 0v to 2v - 2 - nc gate charge source q gs -57nc gate charge drain q gd -1518nc plateau voltage v (plateau) i d = 5a, v ds = 15v - 6 - v input capacitance c iss v ds = 25v, v gs = 0v, f = 1mhz - 750 - pf output capacitance c oss - 105 - pf reverse transfer capacitance c rss -26-pf thermal resistance junction to case r jc - - 1.67 o c/w fsye33a0d, fsye33a0r
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b source to drain diode speci?ations parameter symbol test conditions min typ max units forward voltage v sd i sd = 5a 0.6 - 1.8 v reverse recovery time t rr i sd = 5a, di sd /dt = 100a/ s - - 520 ns electrical speci?ations up to 100 krad t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min max units drain to source breakdown volts (note 3) bv dss v gs = 0, i d = 1ma 400 - v gate to source threshold volts (note 3) v gs(th) v gs = v ds , i d = 1ma 1.5 4.0 v gate to body leakage (notes 2, 3) i gss v gs = 20v, v ds = 0v - 100 na zero gate leakage (note 3) i dss v gs = 0, v ds = 320v - 25 a drain to source on-state volts (notes 1, 3) v ds(on) v gs = 12v, i d = 5a - 6.6 v drain to source on resistance (notes 1, 3) r ds(on)12 v gs = 12v, i d = 3a - 1.2 ? notes: 1. pulse test, 300 s max. 2. absolute value. 3. insitu gamma bias must be sampled for both v gs = 12v, v ds = 0v and v gs = 0v, v ds = 80% bv dss . single event effects (seb, segr) note 4 test symbol environment (note 5) applied v gs bias (v) (note 6) maximum v ds bias (v) ion species typical let (mev/mg/cm) typical range ( ) single event effects safe operating area seesoa ni 26 43 -15 400 ni 26 43 -20 360 br 37 36 -5 400 br 37 36 -10 320 br 37 36 -15 200 br 37 36 -20 80 notes: 4. testing conducted at brookhaven national labs; sponsored by naval surface warfare center (nswc), crane, in. 5. fluence = 1e5 ions/cm 2 (typical), t = 25 o c. 6. does not exhibit single event burnout (seb) or single event gate rupture (segr). performance curves unless otherwise speci?d figure 1. single event effects safe operating area figure 2. typical drain inductance required to limit gamma dot current to i as 0 0 -10 -15 -20 -25 -5 v gs (v) let = 37mev/mg/cm 2 , range = 36 300 200 100 let = 26mev/mg/cm 2 , range = 43 400 500 v ds (v) fluence = 1e5 ions/cm 2 (typical) temp = 25 o c 300 100 10 limiting inductance (henry) drain supply (v) 1000 ilm = 10a 300a 1e-4 1e-5 1e-6 30 100a 30a 1e-7 1e-3 fsye33a0d, fsye33a0r
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b figure 3. maximum continuous drain current vs temperature figure 4. forward bias safe operating area figure 5. basic gate charge waveform figure 6. typical normalized r ds(on) vs junction temperature figure 7. normalized maximum transient thermal response performance curves unless otherwise speci?d (continued) i d , drain (a) t c , case temperature ( o c) 150 100 50 0 -50 0 2 4 6 1 3 5 7 10 1 1 0.1 10 1000 100 100 i d , drain current (a) v ds , drain to source voltage (v) 100 s 1ms t c = 25 o c 10ms operation in this area may be limited by r ds(on) charge q gd q g v g q gs 12v 2.5 2.0 1.5 1.0 0.5 0.0 -80 -40 0 40 80 120 160 t j , junction temperature ( o c) normalized r ds(on) pulse duration = 250ms, v gs = 12v, i d = 3a 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 0.001 0.01 0.1 normalized t, rectangular pulse duration (s) 1 thermal response (z jc ) 10 10 1 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc + t c single pulse 0.5 0.02 0.1 0.01 0.2 0.05 fsye33a0d, fsye33a0r
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b figure 8. unclamped inductive switching performance curves unless otherwise speci?d (continued) 0.01 10 1 0.1 1 10 0.1 100 i as , avalanche current (a) t av , time in avalanche (ms) t av = (l) (i as ) / (1.3 rated bv dss - v dd ) if r = 0 starting t j = 150 o c if r 0 t av = (l/r) ln [(i as *r) / (1.3 rated bv dss - v dd ) + 1] starting t j = 25 o c test circuits and waveforms figure 9. unclamped energy test circuit figure 10. unclamped energy waveforms figure 11. resistive switching test circuit figure 12. resistive switching waveforms t p v gs 20v l + - v ds v dd dut vary t p to obtain required peak i as 0v 50 ? 50 ? 50v-150v i as + - electronic switch opens when i as is reached current transformer v dd v ds bv dss t p i as t av v ds dut r gs 0v v gs = 12v v dd r l t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs t on fsye33a0d, fsye33a0r
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b screening information screening is performed in accordance with the latest revision in effect of mil-prf-19500, (screening information table). delta tests and limits (jantxv equivalent, jans equivalent) t c = 25 o c, unless otherwise speci?d parameter symbol test conditions max units gate to source leakage current i gss v gs = 20v 20 (note 7) na zero gate voltage drain current i dss v ds = 80% rated value 25 (note 7) a drain to source on resistance r ds(on) t c = 25 o c at rated i d 20% (note 8) ? gate threshold voltage v gs(th) i d = 1.0ma 20% (note 8) v notes: 7. or 100% of initial reading (whichever is greater). 8. of initial reading. screening information test jantxv equivalent jans equivalent unclamped inductive switching v gs(peak) = 15v, l = 0.1mh; limit = 15a v gs(peak) = 15v, l = 0.1mh; limit = 15a thermal response t h = 10ms; v h = 25v; i h = 1a; limit = 74mv t h = 10ms; v h = 25v; i h = 1a; limit = 74mv gate stress v gs = 30v, t = 250 sv gs = 30v, t = 250 s pind optional required pre burn-in tests (note 9) mil-prf-19500 group a, subgroup 2 (all static tests at 25 o c) mil-prf-19500 group a, subgroup 2 (all static tests at 25 o c) steady state gate bias (gate stress) mil-prf-750, method 1042, condition b v gs = 80% of rated value, t a = 150 o c, time = 48 hours mil-prf-750, method 1042, condition b v gs = 80% of rated value, t a = 150 o c, time = 48 hours interim electrical tests (note 9) all delta parameters listed in the delta tests and limits table all delta parameters listed in the delta tests and limits table steady state reverse bias (drain stress) mil-prf-750, method 1042, condition a v ds = 80% of rated value, t a = 150 o c, time = 160 hours mil-prf-750, method 1042, condition a v ds = 80% of rated value, t a = 150 o c, time = 240 hours pda 10% 5% final electrical tests (note 9) mil-prf-19500, group a, subgroup 2 mil-prf-19500, group a, subgroups 2 and 3 note: 9. test limits are identical pre and post burn-in. additional tests parameter symbol test conditions max units safe operating area soa v ds = 200v, t = 10ms 0.43 a thermal impedance ? v sd t h = 100ms; v h = 25v; i h = 1a 165 mv fsye33a0d, fsye33a0r
?001 fairchild semiconductor corporation fsye33a0d, fsye33a0r rev. b rad hard data packages - fairchild power transistors txv equivalent 1. rad hard txv equivalent - standard data package a. certificate of compliance b. assembly flow chart c. preconditioning - attributes data sheet d. group a - attributes data sheet e. group b - attributes data sheet f. group c - attributes data sheet g. group d - attributes data sheet 2. rad hard txv equivalent - optional data package a. certificate of compliance b. assembly flow chart c. preconditioning - attributes data sheet - pre and post burn-in read and record data d. group a - attributes data sheet e. group b - attributes data sheet - pre and post read and record data for intermittent operating life (subgroup b3) - bond strength data (subgroup b3) - pre and post high temperature operating life read and record data (subgroup b6) f. group c - attributes data sheet - pre and post read and record data for intermittent operating life (subgroup c6) - bond strength data (subgroup c6) g. group d - attributes data sheet - pre and post rad read and record data class s - equivalents 1. rad hard ? equivalent - standard data package a. certificate of compliance b. serialization records c. assembly flow chart d. sem photos and report e. preconditioning - attributes data sheet - htrb - hi temp gate stress post reverse bias data and delta data - htrb - hi temp drain stress post reverse bias delta data f. group a - attributes data sheet g. group b - attributes data sheet h. group c - attributes data sheet i. group d - attributes data sheet 2. rad hard max. ? equivalent - optional data package a. certificate of compliance b. serialization records c. assembly flow chart d. sem photos and report e. preconditioning - attributes data sheet - htrb - hi temp gate stress post reverse bias data and delta data - htrb - hi temp drain stress post reverse bias delta data - x-ray and x-ray report f. group a - attributes data sheet - subgroups a2, a3, a4, a5 and a7 data g. group b - attributes data sheet - subgroups b1, b3, b4, b5 and b6 data h. group c - attributes data sheet - subgroups c1, c2, c3 and c6 data i. group d - attributes data sheet - pre and post radiation data fsye33a0d, fsye33a0r
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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